on 6/4/2012 7:39 PM
After watching Gael’s recent SkillsMatter talk on multithreading I’ve put together some notes from a very educational talk:   Hardware Cache Hierarchy Four levels of cache L1 (per core) – typically used for instructions L2 (per core) L3 (per die) DRAM (all processors) Data can be cached in multiple caches, and synchronization happens through an [...]
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