View the complete topic at: [link:cs.hubfs.net]

Posted By: Andyman in Applications of F#
Subject: HDFS - Hardware design using F#
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HDFS is a library written in F# which allows hardware to be designed, simulated and then implemented (using standard design flows via Verilog or VHDL) in FPGA's or ASIC's.

[link:www.evilkid.pwp.blueyonder.co.uk]

• Digital logic circuit design in F#
• Structural and behavioural design styles
• VHDL and Verilog netlist generation
• Memory inference
• Instantiation of external HDL models
• Integrated simulator
• Verilog co-simulation (Modelsim only at the moment)
• C, C++ and C# simulation generation
• Integrated waveform viewer
• Resource reporting
• Tree based hierarchy viewer
• Small, but growing, library of utility circuits and functions

The library is based upon a project called HDCaml, authored by Tom Hawkins. For more information on HDCaml see:

[link:www.confluent.org]
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